

#include "xmodule_config.h"

#if MODULE_ECG_ENABLE && LH001_ENABLE

#include <string.h> 


#include "lh001/spi/spi_def.h"
#include "lh001/lh_lib/LH3001.h"

#include "lh001/spi/spi_port.c"

#include "lh001/examples/main_lh001.c"
#include "lh001/examples/adaptive_lms.c"
#include "lh001/examples/lh_ecg.c"
#include "lh001/examples/panTompkins.c"
#include "lh001/examples/process_cmd.c"
#include "lh001/examples/uart_frame.c"

#include "lh001/lh_lib/LH3001.c"

static
bool __lh001_mounting(em_ecg_desc_t* pdesc)
{

    lh001_drv_init();

    uint8_t reg = ADDR_LH3001_CHIPID;
    
    for(int i = 0; i < 10; i++)
    {
        lh3001_read_regs(reg,(uint8_t *)&pdesc->chip_id,1);
        LOG1("[ECG]: chip id = 0x%X", pdesc->chip_id );
        if(pdesc->chip_id == 0x12)
        {
           return true;
        }
        ECG_OS_DELAY_MS( 10 );
    }

    return false;
}

//static
//void __lh001_register_callback(__lh001_evt_handle_t cb )
//{
//    m_hr_local_cb = cb; 
//}
/**
  *
  *
  **/
static
void __lh001_setup(em_ecg_init_t* p_init_obj)
{
    (void)p_init_obj;
    lh_ecg_init();
    lh_ecg_stop();
}

static
void __lh001_start(uint32_t mode)
{
    lh_ecg_init();
    lh_ecg_start();
    data_cnt = 0;
    qrs_sample_cnt = 0;
    xDLPS_set( ecg_dlps_index );
}

static
void __lh001_stop(void)
{
    lh_ecg_stop();
    data_cnt = 0;
    qrs_sample_cnt = 0;
    xDLPS_reset( ecg_dlps_index );
}

//static
//void __lh001_timeout(void)
//{

//}

static
void __lh001_process(void)
{
    lh3001_read_data_nofifo(&dat);
    process_adc_data(&uart_proc,dat);
}

const em_ecg_instance_t ECG_LH001 = 
{    
    .mounting = __lh001_mounting, 
    .setup = __lh001_setup,
    // .set_work_mode = __lh001_set_work_mode,
    
    .start = __lh001_start,
    .stop = __lh001_stop,
    
    .register_callback = em_ecg_register_callback,
    
    .timeout = __lh001_process, 
    .process = __lh001_process, 
};


#endif 
